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build-wheels-publish.yml
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fix: riscv PC advance for compressed instructions and fetch faults Build and publish wheels with cibuildwheel #837: Pull request #2400 synchronize by Kreijstal
Action required Kreijstal:fix/riscv-exception-pc-advance
Kreijstal:fix/riscv-exception-pc-advance
Action required
fix: riscv PC advance for compressed instructions and fetch faults Build and publish wheels with cibuildwheel #836: Pull request #2400 synchronize by Kreijstal
Action required Kreijstal:fix/riscv-exception-pc-advance
Kreijstal:fix/riscv-exception-pc-advance
Action required
fix: riscv PC advance for compressed instructions and fetch faults Build and publish wheels with cibuildwheel #835: Pull request #2400 synchronize by Kreijstal
Action required Kreijstal:fix/riscv-exception-pc-advance
Kreijstal:fix/riscv-exception-pc-advance
Action required
fix: riscv PC advance for compressed instructions and fetch faults Build and publish wheels with cibuildwheel #834: Pull request #2400 opened by Kreijstal
Action required Kreijstal:fix/riscv-exception-pc-advance
Kreijstal:fix/riscv-exception-pc-advance
Action required
target/i386: Mark VPERMILPS as not valid with prefix 0 Build and publish wheels with cibuildwheel #833: Pull request #2399 opened by unknown-1-0
16m 26s unknown-1-0:i386-qemu-7.2.22-fix-vpermilps
unknown-1-0:i386-qemu-7.2.22-fix-vpermilps
16m 26s
feat: add x86 RDRAND instruction hook Build and publish wheels with cibuildwheel #832: Pull request #2398 synchronize by Jvlegod
15m 32s Jvlegod:feature/x86-rdrand-hook
Jvlegod:feature/x86-rdrand-hook
15m 32s
feat: add x86 RDRAND instruction hook Build and publish wheels with cibuildwheel #831: Pull request #2398 synchronize by Jvlegod
1m 52s Jvlegod:feature/x86-rdrand-hook
Jvlegod:feature/x86-rdrand-hook
1m 52s
feat: add x86 RDRAND instruction hook Build and publish wheels with cibuildwheel #830: Pull request #2398 synchronize by Jvlegod
2m 11s Jvlegod:feature/x86-rdrand-hook
Jvlegod:feature/x86-rdrand-hook
2m 11s
feat: add x86 RDRAND instruction hook Build and publish wheels with cibuildwheel #829: Pull request #2398 opened by Jvlegod
19m 51s Jvlegod:feature/x86-rdrand-hook
Jvlegod:feature/x86-rdrand-hook
19m 51s
riscv: keep mstatus.MPP=M after mret on harts without U-mode Build and publish wheels with cibuildwheel #828: Pull request #2396 opened by carlosqwqqwq
-1s carlosqwqqwq:fix/riscv-mret-mpp-no-u
carlosqwqqwq:fix/riscv-mret-mpp-no-u
-1s
riscv: gate D-width atomic translators on the A extension Build and publish wheels with cibuildwheel #827: Pull request #2395 opened by carlosqwqqwq
Action required carlosqwqqwq:fix/riscv-dwidth-atomic-a-gate
carlosqwqqwq:fix/riscv-dwidth-atomic-a-gate
Action required
riscv: reject odd instruction addresses at fetch time Build and publish wheels with cibuildwheel #826: Pull request #2394 opened by carlosqwqqwq
Action required carlosqwqqwq:fix/riscv-odd-pc-reject
carlosqwqqwq:fix/riscv-odd-pc-reject
Action required
riscv: gate fsgnj.d/fmv.d on FPU and D extension Build and publish wheels with cibuildwheel #825: Pull request #2393 opened by carlosqwqqwq
Action required carlosqwqqwq:fix/riscv-fsgnj-d-ext-gate
carlosqwqqwq:fix/riscv-fsgnj-d-ext-gate
Action required
riscv: gate counter CSRs on mcounteren at every priv version Build and publish wheels with cibuildwheel #824: Pull request #2392 opened by carlosqwqqwq
Action required carlosqwqqwq:fix/riscv-counter-csr-mcounteren
carlosqwqqwq:fix/riscv-counter-csr-mcounteren
Action required
target/i386: Decode group 3 /1 instructions as TEST Build and publish wheels with cibuildwheel #823: Pull request #2353 synchronize by unknown-1-0
12m 46s unknown-1-0:i386-decode-modrm-reg-1-in-group-3-as-test
unknown-1-0:i386-decode-modrm-reg-1-in-group-3-as-test
12m 46s
arm: Add missing hflag update after writing PSTATE Build and publish wheels with cibuildwheel #822: Pull request #2386 opened by phverg
Action required phverg:fix-aarch64-pstate-hflags
phverg:fix-aarch64-pstate-hflags
Action required
tests: pre-translate the tb in arm_movr12_hang Build and publish wheels with cibuildwheel #821: Pull request #2385 synchronize by retrocpugeek
Action required retrocpugeek:fix/movr12-hang-flake
retrocpugeek:fix/movr12-hang-flake
Action required
tests: pre-translate the tb in arm_movr12_hang Build and publish wheels with cibuildwheel #820: Pull request #2385 opened by retrocpugeek
Action required retrocpugeek:fix/movr12-hang-flake
retrocpugeek:fix/movr12-hang-flake
Action required
fix: preserve riscv trap pc Build and publish wheels with cibuildwheel #819: Pull request #2384 opened by Jvlegod
9m 37s Jvlegod:fix-riscv-intr-pc
Jvlegod:fix-riscv-intr-pc
9m 37s
fix: zero-extend tricore ld.bu(#2348) Build and publish wheels with cibuildwheel #818: Pull request #2381 synchronize by Jvlegod
11m 18s Jvlegod:fix/tricore-ld-bu-preinc
Jvlegod:fix/tricore-ld-bu-preinc
11m 18s
handle unmapped until address correct Build and publish wheels with cibuildwheel #817: Pull request #2382 opened by PhilippTakacs
13m 9s PhilippTakacs:invalid_end
PhilippTakacs:invalid_end
13m 9s
add block hook with instruction count Build and publish wheels with cibuildwheel #816: Pull request #2378 synchronize by PhilippTakacs
10m 39s PhilippTakacs:block_icount
PhilippTakacs:block_icount
10m 39s
add block hook with instruction count Build and publish wheels with cibuildwheel #815: Pull request #2378 synchronize by PhilippTakacs
13m 32s PhilippTakacs:block_icount
PhilippTakacs:block_icount
13m 32s
fix: zero-extend tricore ld.bu(#2348) Build and publish wheels with cibuildwheel #814: Pull request #2381 synchronize by Jvlegod
10m 19s Jvlegod:fix/tricore-ld-bu-preinc
Jvlegod:fix/tricore-ld-bu-preinc
10m 19s
fix: zero-extend tricore ld.bu(#2348) Build and publish wheels with cibuildwheel #813: Pull request #2381 opened by Jvlegod
15m 46s Jvlegod:fix/tricore-ld-bu-preinc
Jvlegod:fix/tricore-ld-bu-preinc
15m 46s