Releases: pulp-platform/common_cells
Releases · pulp-platform/common_cells
Release list
v2.0.0-beta.3
2.0.0-beta.3 - 2026-07-29
Added
cc_heaviside: Add open-source formal verification and document saturation behavior
Fixed
- Deprecated stream arbiter wrappers: Fix elaboration with Synopsys Fusion Compiler
v2.0.0-beta.2
2.0.0-beta.2 - 2026-07-16
Changed
README: Update cell names, links, and API documentation for v2
Fixed
cc_fifo,cc_delta_counter: Use named synchronous clear signals for Synopsys Fusion Compiler compatibilitycc_binary_to_gray: Fix the lint for theWidth == 1special caseassertions.svh: Use the built-inXILINX_SIMULATORmacro to disable assertions under Xilinx simulationcc_trip_counter: Fix theCounterExceedsBoundassertion on trip cycles and document exact-bound behavior
v2.0.0-beta
2.0.0-beta - 2026-07-02
Added
- Add deprecated v1 compatibility wrappers for renamed modules, packages, register macros and formal properties
- Add
cc_no_deprecatedBender target for strict v2-only builds - Add
cc_pkgand mergecf_math_pkg,ecc_pkg, and CDC reset-control types into it - Add
cc_delta_counter,cc_majority_vote_filter,cc_serial_deglitchandcc_onehot - Add formal checks for
cc_cdc_reset_ctrlrandcc_lzc - Add timed CDC test coverage for 2-phase, 4-phase, FIFO, gray FIFO, and clearable CDC paths
Changed
- Move the generic
synccell totech_cells_generic - Prefix public RTL modules, interfaces, testbenches, and formal properties with
cc_ - Rename ports to
_i/_o, parameters toUpperCamelCase, and type parameters to*_t - Replace string parameters with enums and integer-like parameters with typed
int unsignedorbit - Convert dependent parameters to localparams where they are not part of the public API
- Add synchronous
clr_isupport to sequential cells and update register macro defaults - Rename
fifo_v3tocc_fifoandshift_regtocc_shift_register - Remove
testmode_ifromcc_fifoand dependent modules - Fold
stream_arbiter_flushableintocc_stream_arbiter - Rename the functional clear of
cc_serial_deglitchtorestart_i - Restructure CDC implementations with explicit source/destination sides and unify configurable synchronizer parameters
- Extend CI with Bender-based formal runs, Slang, Verible, Verilator, Questa/VCS elaboration, and SpyGlass lint
Fixed
cc_popcount: Fix output widthcc_lzc: Fix non-power-of-two widths and add formal coveragecc_fifo: Fixusage_otruncation for power-of-two depthscc_rr_arb_tree: Fix inconsistent grant behavior forNumIn == 1cc_passthrough_stream_fifo: Fix pointer updates under full handshakescc_cdc_reset_ctrlr: Keep async reset-control payloads contained inside the CDCcc_cdc_fifo_gray_clearable: Preserve async reset-control timing across sync-stage configurations- Fix Verilator
IMPLICIT,UNOPTFLAT,MULTIDRIVEN, and selected width warnings - Fix SpyGlass lint findings and improve elaboration/tool compatibility
Removed
- Remove already-deprecated legacy modules that are not part of the v1 compatibility wrapper set
- Remove Travis CI and replace the old lint workflow with the new CI setup
v1.40.0
1.40.0 - 2026-07-02
Fixed
stream_mux: Fix select width forN_INP == 1clk_int_div: Fix SpyGlass W415a lint issuecdc_*_tb: Fix mailbox type mismatchcommon_cells.core: Add missing source fileBender.yml: Exclude deprecatedsram.svwhen targeting CVA6README: Fix register macro formatting
v1.39.0
1.39.0 - 2025-11-20
Added
boxcar: Add boxcar function to compose bit masksheaviside: Add Heaviside function to compose bit masksring_buffer: Add ring buffer with sequential write and random readstrip_counter: Add counter with 'trip' output when reaching threshold value
Changed
cb_filter,id_queue,lzc,rr_arb_tree: Speed up Verilator simulationcdc_fifo_gray*,isochronous_spill_register: Change flip-flops without to flip-flops with resetisochronous_spill_register: Remove unnecessary data stability assertionsaddr_decode*: Change assumed integer index to arbitrary type (default remains integer)
Fixed
id_queue: Fix struct accesscdc_fifo_gray*: Fix Spyglass linting edge caselzc: Fix assertion for degenerate caseWIDTH == 0- Fix Verilator compilation by adding guard statements
v1.38.0
1.38.0 - 2025-02-28
Changed
- Assertions no longer disabled for Verilator. Define
ASSERTS_OFFto disable. - Define
ASSERTS_OVERRIDE_ONto override any defines that turn assertions off otherwise. id_queue: Parametrize number of compare ports.assertions.svh: Add optional argument to assertion macros to display custom error message.stream_to_mem: Disable assertions during reset.addr_decode_dync,cdc_fifo_gray_clearable,multiaddr_decode,spill_register_flushable: Promote$warningto$error.rr_arb_tree,stream_omega_net,stream_xbar: Remove default assertion disable.
Fixed
delta_counter: Fix inverted reset.stream_join_dynamic: Handshake only selected streams.- Various tool compatibility improvements.