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YOLO11 Zynq-7020 FPGA Deployment

Hardware-accelerated YOLO11 object detection on Xilinx Zynq-7020 FPGA (PYNQ-Z2 board) using Keras 3, HGQ2, and HLS4ML.

Overview

This project implements a complete pipeline for deploying YOLO11 object detection model on FPGA:

  • Model Design: YOLO11 implementation in Keras 3
  • Quantization: 8-bit quantization using HGQ2
  • HLS Synthesis: C++ code generation and IP core creation using HLS4ML
  • FPGA Integration: Vivado project for Zynq-7020
  • PYNQ Package: Python API for easy deployment and testing

Features

  • Real-time object detection on FPGA
  • 10-50x speedup compared to CPU inference
  • Low power consumption (~2-5W)
  • Easy-to-use Python API
  • Support for 80 COCO object classes
  • DMA-accelerated data transfer
  • Comprehensive testing suite

Hardware Requirements

  • FPGA Board: PYNQ-Z2 (Zynq-7020)
  • Host PC: Ubuntu 18.04+ with Vivado 2020.1+
  • SD Card: 16GB minimum for PYNQ image
  • Power Supply: 12V/3A
  • Optional: USB camera for real-time demo

Software Requirements

Development Environment

- Python 3.8+
- TensorFlow 2.15+
- Keras 3.0+
- HGQ >= 0.2.0
- HLS4ML >= 0.8.0
- Vivado HLS 2020.1+
- Vivado 2020.1+

PYNQ Board

- PYNQ 3.0+ image
- Python 3.8+
- OpenCV 4.5+
- NumPy 1.19+

Project Structure

yolo11_zynq_deployment/
β”œβ”€β”€ config.yaml                 # Configuration file
β”œβ”€β”€ requirements.txt            # Python dependencies
β”œβ”€β”€ models/
β”‚   └── yolo11_model.py        # YOLO11 Keras implementation
β”œβ”€β”€ quantization/
β”‚   └── quantize_model.py      # HGQ2 quantization script
β”œβ”€β”€ scripts/
β”‚   β”œβ”€β”€ hls4ml_conversion.py   # HLS4ML conversion
β”‚   β”œβ”€β”€ test_hardware.py       # Hardware testing
β”‚   └── demo.ipynb             # Jupyter demo
β”œβ”€β”€ vivado_project/
β”‚   └── build_vivado.tcl       # Vivado build script
β”œβ”€β”€ pynq_package/
β”‚   β”œβ”€β”€ setup.py               # PYNQ package setup
β”‚   β”œβ”€β”€ drivers/
β”‚   β”‚   └── yolo11_driver.py   # Hardware driver
β”‚   └── overlays/              # Bitstream files
β”œβ”€β”€ hls4ml_output/             # HLS generated code
β”œβ”€β”€ test_data/
β”‚   β”œβ”€β”€ images/                # Test images
β”‚   └── results/               # Detection results
└── docs/                      # Documentation

Installation & Usage

Step 1: Environment Setup

# Clone repository
git clone https://github.com/yourusername/yolo11-zynq-deployment.git
cd yolo11-zynq-deployment

# Install dependencies
pip install -r requirements.txt

Step 2: Model Design & Training

# The YOLO11 model is already implemented in models/yolo11_model.py
# For training with real data, replace dummy dataset with COCO dataset

python models/yolo11_model.py  # Test model creation

Step 3: Quantization

# Run quantization-aware training
cd quantization
python quantize_model.py

# This will:
# - Load YOLO11 model
# - Apply HGQ2 quantization
# - Perform QAT (Quantization-Aware Training)
# - Export quantized model

Expected output:

  • quantization/yolo11_quantized.keras - Quantized model
  • quantization/yolo11_quantized_config.json - Quantization config

Step 4: HLS4ML Conversion

# Convert to HLS
cd ../scripts
python hls4ml_conversion.py

# This will:
# - Convert Keras model to HLS C++
# - Run C simulation
# - Synthesize IP core
# - Generate synthesis report

Expected output:

  • hls4ml_output/yolo11_hls/ - HLS C++ code
  • IP core ready for Vivado integration
  • Synthesis report with resource utilization

Step 5: Vivado Synthesis

# Build Vivado project
cd ../vivado_project

# Run Vivado in batch mode
vivado -mode batch -source build_vivado.tcl

# Or use GUI mode for debugging
vivado -mode gui

# This will:
# - Create Vivado project
# - Add IP cores
# - Build block design
# - Run synthesis & implementation
# - Generate bitstream

Expected outputs:

  • yolo11_accelerator.bit - FPGA bitstream
  • yolo11_accelerator.hwh - Hardware handoff file
  • yolo11_accelerator.xsa - Hardware platform

Step 6: Deploy to PYNQ

# Copy files to PYNQ board
scp -r pynq_package xilinx@192.168.2.99:/home/xilinx/
scp vivado_project/*.bit xilinx@192.168.2.99:/home/xilinx/pynq_package/overlays/
scp vivado_project/*.hwh xilinx@192.168.2.99:/home/xilinx/pynq_package/overlays/

# SSH into PYNQ board
ssh xilinx@192.168.2.99

# Install package
cd /home/xilinx/pynq_package
sudo pip install -e .

Step 7: Test on PYNQ

# Python test script
from yolo11_pynq import YOLO11Accelerator
from PIL import Image

# Initialize accelerator
accel = YOLO11Accelerator('/home/xilinx/pynq_package/overlays/yolo11_overlay.bit')

# Load image
image = Image.open('test.jpg')

# Run detection
detections = accel.detect(image)

# Print results
for det in detections:
    print(f"Class: {det['class_id']}, Confidence: {det['confidence']:.2f}")

Or use Jupyter notebook:

jupyter notebook scripts/demo.ipynb

Performance Metrics

Expected Performance

Metric Value
Input Size 224x224x3
Inference Time 10-50ms
Throughput 20-100 FPS
Power Consumption 2-5W
Speedup vs CPU 10-50x

Resource Utilization (Zynq-7020)

Resource Used Available Utilization
LUT ~40k 53,200 ~75%
FF ~50k 106,400 ~47%
BRAM ~100 140 ~71%
DSP ~180 220 ~82%

Note: Actual values depend on quantization settings and model optimizations

Configuration

Edit config.yaml to customize:

# Model configuration
model:
  input_shape: [224, 224, 3]  # Adjust for resource constraints
  num_classes: 80

# Quantization settings
quantization:
  weight_bits: 8              # 4, 8, or 16
  activation_bits: 8          # 4, 8, or 16

# HLS4ML settings
hls4ml:
  reuse_factor: 8             # Higher = less resources, slower
  clock_period: 10            # ns (100 MHz)

Troubleshooting

Common Issues

  1. HLS Synthesis Fails

    • Reduce model size or increase reuse factor
    • Check resource utilization in synthesis report
    • Use smaller input size (e.g., 160x160)
  2. Bitstream Loading Error

    • Verify .bit and .hwh files match
    • Check PYNQ board IP address
    • Ensure PYNQ image version compatibility
  3. Poor Detection Accuracy

    • Increase quantization bits (8β†’16)
    • Extend QAT training epochs
    • Verify quantization config
  4. Low Performance

    • Enable DMA transfers
    • Optimize clock frequency
    • Use parallel processing

Advanced Topics

Custom Training

Replace dummy dataset in quantization/quantize_model.py:

# Load COCO dataset
from tensorflow.keras.preprocessing.image import ImageDataGenerator

train_datagen = ImageDataGenerator(...)
X_train, y_train = load_coco_dataset(...)

Model Optimization

  • Pruning: Remove redundant channels
  • Knowledge Distillation: Train smaller model from larger one
  • Mixed Precision: Use different bits for different layers

Custom IP Integration

Modify vivado_project/build_vivado.tcl to add custom IP cores:

# Add custom preprocessing IP
create_bd_cell -type ip -vlnv xilinx.com:user:preprocess:1.0 preprocess_0

Citation

If you use this project, please cite:

@software{yolo11_zynq_deployment,
  title={YOLO11 Deployment on Zynq-7020 FPGA},
  author={Your Name},
  year={2025},
  url={https://github.com/yourusername/yolo11-zynq-deployment}
}

References

License

This project is licensed under the MIT License - see LICENSE file for details.

Acknowledgments

  • Keras team for the deep learning framework
  • HGQ2 developers for quantization tools
  • HLS4ML team for FPGA synthesis
  • PYNQ team for the Python overlay framework

Contact

For questions or issues:

Roadmap

  • Support for YOLO11s/m/l variants
  • INT4 quantization support
  • Real-time video streaming
  • Multi-camera support
  • Web interface for deployment
  • Performance profiling tools
  • Automated hyperparameter tuning

Status: Beta Release Last Updated: 2025-10-23 Tested on: PYNQ-Z2 v3.0.1, Vivado 2020.1

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