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Add Fairchild F8 processor module#9087

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polartape wants to merge 1 commit intoNationalSecurityAgency:masterfrom
polartape:feature/processor-f8
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Add Fairchild F8 processor module#9087
polartape wants to merge 1 commit intoNationalSecurityAgency:masterfrom
polartape:feature/processor-f8

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@polartape polartape commented Mar 29, 2026

Summary

New processor module for the Fairchild F8 / Mostek MK3870 microprocessor family (1975). Ghidra does not currently include F8 support.

  • All 76 instructions implemented
  • 5 variants: F8 (generic), F3850, MK3870, F3870, MK3873
  • Variant-specific pspecs with correct interrupt vectors
  • Scratchpad (R0-R63) in dedicated ram_space for aliasing correctness
  • Verified against F3850 CPU Datasheet, F8 Guide to Programming, F8 User's Guide, and Mostek 1981 Data Book
  • Tested with real MK3870 firmware (Revox 710, 2K ROM)
  • 256 pcode emulator assertions, all passing
  • Cross-verified against MAME F8 emulator

Test plan

  • SLEIGH compiles without errors
  • Import and disassemble MK3870 binary firmware
  • Pcode emulator tests pass (256 assertions)
  • Decompiler produces C output for all functions

AI (Claude Code) was used to assist with verification, testing, and implementation.

New processor module for the Fairchild F8 / Mostek MK3870
microprocessor family (1975). All 76 instructions implemented
with full decompiler support.

Variants with dedicated pspecs:
- F3850: multi-chip CPU (programmable interrupt vectors)
- MK3870/F3870: single-chip (Timer $020 + External $0A0 vectors)
- MK3873: single-chip with serial port (5 interrupt vectors)

Scratchpad (R0-R63) placed in dedicated ram_space for correct
decompiler data-flow analysis through both direct and ISAR
indirect addressing modes.

Verified against F3850 CPU Datasheet, F8 Guide to Programming,
F8 User's Guide, Mostek 1981 Data Book, and MAME F8 emulator.
256 pcode emulator assertions passing.
@polartape polartape force-pushed the feature/processor-f8 branch from d878ad2 to 32fa477 Compare March 31, 2026 18:27
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Force-pushed with bugfixes and improvements found during verification:

  • Moved scratchpad (R0-R63) from register_space to dedicated ram_space with explicit constructors for aliasing correctness
  • Fixed BF 9-14 (0x99-0x9E): overflow bit was missing from branch masks
  • Fixed LR W,J: added 5-bit mask (& 0x1F)
  • Added variant-specific pspecs: MK3870 (Timer+External vectors), MK3873 (5 vectors incl. serial), F3850 (RESET only)
  • Unified flag macros: SR 4, SL 4, COM now use clearOC()/setZS()
  • BCD correction refactored into macro (no semantic change)
  • 256 pcode assertions passing (was 249, added BF overflow tests)
  • Disassembly byte-identical to previous version

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