Reverse engineering HPE gen9 server

Caution

Disclaimer / Reverse Engineering Notice:
All information, diagrams, and schematics in this repository were obtained through independent reverse engineering, measurement, and observation. No proprietary, confidential, or leaked documents were used directly to create this content. All pin assignments, signal mappings, and layouts represent independent analysis and do not reproduce any proprietary documentation.

This project is intended for educational, research, and interoperability purposes only. Commercial use of patented or proprietary technologies is not authorized by this notice.

Note

This repo is still being developed (WIP). All information in this repository is provided in good faith but may contain inaccuracies.

Fan pinout

• series WTB BMI Fan Connectors

  • Amphenol G875C02141DEU - crimp terminal - tin version
  • Amphenol G875C02142DEU - crimp terminal - gold plated version
  • Amphenol G875H10620DEU - 6-pin male crimp connector
  • Amphenol G86106413D2EU - 6-pin female THT recepticle# HPE-gen9-server-reverse-engineering

• 3D printed replacement for Amphenol G875H10620DEU useing 6-pin 2.0mm Dupont, either female header or female crimp connector. Here!

• To enable the fan detection, connect the detect pin directly to GND. The PWM signal is reversed eg. fans runs at 100% when pwm is at 0% compared to normal PC fan. So a some type of convertor will be necessary for fan swap.

10pin backplane power connector

• series Micro-Fit 3.0
  • Molex 43030000 - crimp terminal
  • Molex 430251000 - 10 pin male crimp connector
  • Molex 430451013 - 10 pin female THT receptacle

6+4pin 8SSF backplane power connector

• series Micro-Fit 3.0
  • Molex 43030000 - crimp terminal
  • Molex 0430250400 - 4-pin male crimp connector
  • Molex 0430450413 - 4-pin female THT receptacle
  • Molex 430250600 - 6-pin male crimp connector
  • Molex 430450612 - 6-pin female THT receptacle

Front IO panel

• Proprietary HPE connector?

DL360 main raiser card

Surounding component with silkscreen of U2 = VHC125 TOS - IO buffer, U3 = 74LV165AD - 8bit serial register, and one unknow U4 = E3 8A

TODO:

• Map the pinout of front backplane connector
• Map the pinout of port on 8SSF backplane
• Map the pinout of front IO connector
• Map the pinout of fan connector
• Map the pinout of "Smart array connector"
• Map the pinout of main PCIE raiser card port
• Map the pinout of seccondart PCIE raiser card port