02-Vitis_Subsystem_Simulation

AMD Vitis™ System Design Tutorials See Vitis™ Development Environment on amd.com

Vitis Subsystem Simulation

The feature Vitis Subsystem Simulation enables user to simulate AI Engine + PL designs in a RTL testbench environment. By running the AI Engine simulation encapsulated in a VSS component, the interaction between AI Engine PLIO and custom RTL can be analyzed and verified without having to go through the full system emulation flow.

This feature is demonstrated using Vivado XSIM as part of the Versal Vitis Subsystem Flow.

For details, see Simulate AIE+PL in XSIM with RTL testbench.

Note: This is an Early Access feature and can be subject to change. Please contact your local FAE for information and details.

_{Copyright © 2020–2025 Advanced Micro Devices, Inc.}

^{Terms and Conditions}