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[AIROCMLIR-551] Completely support as_underlying_shape and as_logical_shape (#2265)
## Motivation Being able to support transposed memory layout, long strides in both as_underlying_shape and as_logical_shape. Furthermore, in `as_underlying_shape`, broadcasting is supported. ## Technical Details This one PR essentially implements these two commits: #2198 , [this one](61116258d7c1b). as_logical_shape is implemented as the following: 1. Reshape from flat memory layout to memory layout 2. Check the stride permutation, and invert it to match the logical shape 3. If the memory layout tensor is "greater in dimension" than the logical dimension, it means that we have a long stride layout so we emit tensor.extract_from_slice to get the logical shape 4. Broadcast if needed as_underlying_shape is implemented as the following: 1. Reshape to memory based on stride permutation 2. If there are long strides, we emit a tensor.insert_slice with a tensor.empty_op 3. If there is broadcasting, we error out.
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8 files changed

+500
-65
lines changed

‎mlir/include/mlir/Conversion/LinalgToRock/LinalgToRock.h‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@
1313
#ifndef MLIR_CONVERSION_LINALGTOROCK_H
1414
#define MLIR_CONVERSION_LINALGTOROCK_H
1515

16+
#include "mlir/Dialect/Tensor/IR/Tensor.h"
1617
#include "mlir/IR/PatternMatch.h"
1718
#include "mlir/Pass/Pass.h"
1819
#include "mlir/Transforms/DialectConversion.h"
@@ -24,6 +25,9 @@ namespace mlir {
2425
namespace rock {
2526
void populateLinalgToRockConversionPattern(RewritePatternSet &pattern,
2627
MLIRContext *context);
28+
29+
/// A tensor.insert_slice is said to be a rock.expand_strides
30+
bool isRockExpandStride(tensor::InsertSliceOp op);
2731
}
2832
} // namespace mlir
2933

‎mlir/lib/Conversion/LinalgToRock/LinalgToRock.cpp‎

Lines changed: 46 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -139,8 +139,53 @@ LogicalResult MatmulConverter<LinalgMatOp>::matchAndRewrite(
139139
return success();
140140
}
141141

142+
//===----------------------------------------------------------------------===//
143+
// shape related changes
144+
//===----------------------------------------------------------------------===//
145+
namespace {
146+
struct ExpandStrideConverter final
147+
: public OpConversionPattern<tensor::InsertSliceOp> {
148+
using OpConversionPattern<tensor::InsertSliceOp>::OpConversionPattern;
149+
using OpConversionPattern<tensor::InsertSliceOp>::getTypeConverter;
150+
using OpAdaptor =
151+
typename OpConversionPattern<tensor::InsertSliceOp>::OpAdaptor;
152+
153+
LogicalResult
154+
matchAndRewrite(tensor::InsertSliceOp op, OpAdaptor adaptor,
155+
ConversionPatternRewriter &rewriter) const override;
156+
};
157+
} // namespace
158+
159+
bool mlir::rock::isRockExpandStride(tensor::InsertSliceOp op) {
160+
return op->hasAttr("rock.is_expand_strides") &&
161+
isa<tensor::EmptyOp>(op.getOperand(1).getDefiningOp());
162+
}
163+
164+
LogicalResult ExpandStrideConverter::matchAndRewrite(
165+
tensor::InsertSliceOp op, OpAdaptor adaptor,
166+
ConversionPatternRewriter &rewriter) const {
167+
// The migraphx-to-linalg passes emits the rock.is_expand_stride attribute
168+
// to indicate that the insert_slice is an expand_stride. In that case, we
169+
// transform it into a rock.expand_strides.
170+
if (!rock::isRockExpandStride(op)) {
171+
return failure();
172+
}
173+
tensor::EmptyOp tensorEmpty =
174+
dyn_cast<tensor::EmptyOp>(op.getOperand(1).getDefiningOp());
175+
assert(tensorEmpty && "Should have been checked by isRockExpandStride");
176+
177+
Location loc = op.getLoc();
178+
auto alloc = bufferization::AllocTensorOp::create(
179+
rewriter, loc, tensorEmpty.getResult().getType(), {});
180+
auto expandOp = rock::ExpandStridesOp::create(rewriter, loc, op.getType(),
181+
adaptor.getSource(), alloc);
182+
rewriter.replaceOp(op, expandOp);
183+
return success();
184+
}
185+
142186
void mlir::rock::populateLinalgToRockConversionPattern(
143187
RewritePatternSet &pattern, MLIRContext *context) {
144188
pattern.add<MatmulConverter<linalg::BatchMatmulOp>,
145-
MatmulConverter<linalg::MatmulOp>>(context);
189+
MatmulConverter<linalg::MatmulOp>, ExpandStrideConverter>(
190+
context);
146191
}

‎mlir/lib/Conversion/LinalgToRock/LinalgToRockPass.cpp‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,13 @@ static void populateLinalgToRockDialectConversion(ConversionTarget &target) {
3838
rock::RockDialect, bufferization::BufferizationDialect,
3939
math::MathDialect>();
4040

41+
// a tensor.insert_slice could be a rock expand stride, and in that case
42+
// we expand it into a rock.expand_stride
43+
target.addDynamicallyLegalOp<tensor::InsertSliceOp>(
44+
[](tensor::InsertSliceOp op) -> std::optional<bool> {
45+
return !rock::isRockExpandStride(op);
46+
});
47+
4148
// We only allow Linalg operations that are elementwise. Fusion is supported
4249
// via linalg.generic when it is an elementwise operation. Elementwise
4350
// operations would be converted into linalg.generic in later passes

‎mlir/lib/Conversion/MIGraphXToLinalg/MIGraphXToLinalg.cpp‎

Lines changed: 192 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -53,60 +53,222 @@ struct AsLogicalShapeOpConverter final
5353
};
5454
} // namespace
5555

56-
/// Checking to see if the permutation vector is like (0, 1, 2, 3, 4, 5, ...)
57-
static bool isPermutationStandardForm(ArrayRef<int64_t> permutation) {
58-
SmallVector<int64_t, 4> increasingVec(permutation.size(), 0);
59-
std::iota(increasingVec.begin(), increasingVec.end(), 0);
60-
return llvm::equal(permutation, increasingVec);
61-
}
62-
6356
LogicalResult AsLogicalShapeOpConverter::matchAndRewrite(
6457
migraphx::AsLogicalShapeOp op, OpAdaptor adaptor,
6558
ConversionPatternRewriter &rewriter) const {
6659
Location loc = op.getLoc();
6760
migraphx::MIXRShapedType inType = op.getIn().getType();
6861
RankedTensorType resultType = op.getOut().getType();
69-
Value in = adaptor.getIn(); // The shape we are casting from
62+
RankedTensorType memoryType = inType.asMemoryLayoutTensor();
7063

71-
SmallVector<int64_t, 4> permutation;
72-
inType.getStridePermutation(permutation);
73-
if (isPermutationStandardForm(permutation)) {
64+
/// Expand a flat/underlying value into the N-D memory layout tensor.
65+
auto expandToMemoryLayout = [&](Value input) -> Value {
66+
if (input.getType() == memoryType)
67+
return input;
7468
SmallVector<ReassociationIndices, 4> reassociationIndex(
75-
1, ReassociationIndices(resultType.getRank(), 0));
69+
1, ReassociationIndices(memoryType.getRank(), 0));
7670
std::iota(reassociationIndex[0].begin(), reassociationIndex[0].end(), 0);
77-
auto newShape = tensor::ExpandShapeOp::create(rewriter, loc, resultType, in,
78-
reassociationIndex);
79-
rewriter.replaceOp(op, newShape);
71+
return tensor::ExpandShapeOp::create(rewriter, loc, memoryType, input,
72+
reassociationIndex);
73+
};
74+
75+
/// Invert the stride permutation to transpose from memory order back to
76+
/// logical order.
77+
auto transposeToLogicalOrder = [&](Value input) -> Value {
78+
SmallVector<int64_t, 4> inversePermutation;
79+
inType.getStridePermutation(inversePermutation);
80+
size_t nDims = inversePermutation.size();
81+
bool hasTranspose =
82+
!llvm::equal(llvm::seq<int64_t>(nDims), inversePermutation);
83+
if (!hasTranspose)
84+
return input;
85+
86+
// Calculating the transposed shape and permutation
87+
SmallVector<int64_t, 4> permutation, transposedShape;
88+
permutation.resize_for_overwrite(nDims);
89+
transposedShape.resize_for_overwrite(nDims);
90+
RankedTensorType inputType = cast<RankedTensorType>(input.getType());
91+
for (auto [to, from] : llvm::enumerate(inversePermutation)) {
92+
permutation[from] = to;
93+
transposedShape[from] = inputType.getShape()[to];
94+
}
95+
96+
Value init = tensor::EmptyOp::create(rewriter, loc, transposedShape,
97+
inputType.getElementType())
98+
.getResult();
99+
return linalg::TransposeOp::create(rewriter, loc, input, init, permutation)
100+
.getResult()[0];
101+
};
102+
103+
/// Extract the logical slice when the memory layout is larger than the
104+
/// logical shape (broadcast dimensions are collapsed to size 1).
105+
auto tryExtractSlice = [&](Value input) -> Value {
106+
SmallVector<int64_t, 4> slicingShape(resultType.getShape());
107+
for (auto [dim, stride] :
108+
llvm::zip_equal(slicingShape, inType.getStrides())) {
109+
if (stride == 0)
110+
dim = 1;
111+
}
112+
RankedTensorType inputType = cast<RankedTensorType>(input.getType());
113+
if (inputType.getShape() == ArrayRef(slicingShape)) {
114+
return input;
115+
}
116+
117+
assert(llvm::none_of(llvm::zip_equal(slicingShape, inputType.getShape()),
118+
[](auto val) {
119+
auto [sliceDim, inputDim] = val;
120+
return sliceDim > inputDim;
121+
}) &&
122+
"this should have been checked by the verifier as the memory layout "
123+
"must be greater than the logical layout");
124+
125+
RankedTensorType sliceType = resultType.clone(slicingShape);
126+
SmallVector<OpFoldResult, 4> offset(sliceType.getRank(),
127+
rewriter.getIndexAttr(0)),
128+
sizes;
129+
llvm::transform(sliceType.getShape(), std::back_inserter(sizes),
130+
[&](int64_t size) { return rewriter.getIndexAttr(size); });
131+
SmallVector<OpFoldResult, 4> strides(sliceType.getRank(),
132+
rewriter.getIndexAttr(1));
133+
tensor::ExtractSliceOp extractOp = tensor::ExtractSliceOp::create(
134+
rewriter, loc, input, offset, sizes, strides);
135+
return extractOp.getResult();
136+
};
137+
138+
/// Broadcast along dimensions whose stride is 0 to reach the full logical
139+
/// shape.
140+
auto tryBroadcast = [&](Value input) -> Value {
141+
if (input.getType() == resultType)
142+
return input;
143+
SmallVector<int64_t, 4> linalgInputShape, broadcastDimensions;
144+
for (auto [index, stride, shape] :
145+
llvm::enumerate(inType.getStrides(), inType.getShape())) {
146+
if (stride != 0)
147+
linalgInputShape.push_back(shape);
148+
else
149+
broadcastDimensions.push_back(index);
150+
}
151+
SmallVector<ReassociationIndices, 4> reassociationOne(
152+
1, ReassociationIndices(resultType.getRank(), 0));
153+
SmallVector<ReassociationIndices, 4> reassociationTwo(
154+
1, ReassociationIndices(linalgInputShape.size(), 0));
155+
std::iota(reassociationOne[0].begin(), reassociationOne[0].end(), 0);
156+
std::iota(reassociationTwo[0].begin(), reassociationTwo[0].end(), 0);
157+
input =
158+
tensor::CollapseShapeOp::create(rewriter, loc, input, reassociationOne);
159+
input = tensor::ExpandShapeOp::create(
160+
rewriter, loc,
161+
RankedTensorType::get(linalgInputShape, resultType.getElementType()),
162+
input, reassociationTwo);
163+
auto init = tensor::EmptyOp::create(rewriter, loc, resultType.getShape(),
164+
resultType.getElementType());
165+
return linalg::BroadcastOp::create(rewriter, loc, input, init,
166+
broadcastDimensions)
167+
.getResult()[0];
168+
};
169+
170+
Value result = expandToMemoryLayout(adaptor.getIn());
171+
result = transposeToLogicalOrder(result);
172+
173+
if (result.getType() == resultType) {
174+
rewriter.replaceOp(op, result);
80175
return success();
81176
}
82177

83-
return op.emitError(
84-
"input shape is non standard or broadcast; cannot convert this shape");
178+
// handle long stride/broadcasting here
179+
result = tryExtractSlice(result);
180+
result = tryBroadcast(result);
181+
182+
rewriter.replaceOp(op, result);
183+
return success();
85184
}
86185

87186
LogicalResult AsUnderlyingShapeConverter::matchAndRewrite(
88187
migraphx::AsUnderlyingShapeOp op, OpAdaptor adaptor,
89188
ConversionPatternRewriter &rewriter) const {
90189
Location loc = op.getLoc();
190+
migraphx::MIXRShapedType resultType = op.getOut().getType();
91191
Value in = adaptor.getIn();
92-
migraphx::MIXRShapedType resultType = op.getResult().getType();
93-
auto resultTensorType =
94-
cast<RankedTensorType>(getTypeConverter()->convertType(resultType));
192+
RankedTensorType memoryLayoutType = resultType.asMemoryLayoutTensor();
193+
RankedTensorType inTensorType = cast<RankedTensorType>(in.getType());
95194

96-
SmallVector<int64_t, 4> permutation;
97-
resultType.getStridePermutation(permutation);
98-
if (isPermutationStandardForm(permutation)) {
195+
RankedTensorType resultTensorType =
196+
dyn_cast<RankedTensorType>(getTypeConverter()->convertType(resultType));
197+
if (!resultTensorType)
198+
return op.emitOpError("unsupported conversion to underlying shape");
199+
200+
if (inTensorType == resultTensorType) {
201+
rewriter.replaceOp(op, in);
202+
return success();
203+
}
204+
205+
/// Transpose from logical order to memory layout order.
206+
auto transposeToMemoryOrder = [&](Value input) -> Value {
207+
SmallVector<int64_t, 4> permutation;
208+
resultType.getStridePermutation(permutation);
209+
if (llvm::is_sorted(permutation))
210+
return input;
211+
RankedTensorType inputType = cast<RankedTensorType>(input.getType());
212+
SmallVector<int64_t, 4> transposedShape;
213+
llvm::transform(permutation, std::back_inserter(transposedShape),
214+
[&](int64_t p) { return inputType.getShape()[p]; });
215+
auto init = tensor::EmptyOp::create(rewriter, loc, transposedShape,
216+
inputType.getElementType())
217+
.getResult();
218+
return linalg::TransposeOp::create(rewriter, loc, input, init, permutation)
219+
.getResult()[0];
220+
};
221+
222+
/// Pad via insert_slice when the transposed shape is smaller than the
223+
/// memory layout (e.g. due to stride-based padding).
224+
auto tryInsertSlice = [&](Value input) -> FailureOr<Value> {
225+
if (input.getType() == memoryLayoutType)
226+
return input;
227+
if (resultType.hasBroadcast())
228+
return op.emitOpError(
229+
"writing to tensors with broadcasts is unsupported");
230+
RankedTensorType inputType = cast<RankedTensorType>(input.getType());
231+
for (auto [index, memDim, inDim] :
232+
llvm::enumerate(memoryLayoutType.getShape(), inputType.getShape())) {
233+
if (memDim < inDim) {
234+
return op.emitOpError("memory layout dimension ")
235+
<< memDim << " is smaller than logical dimension " << inDim
236+
<< "; this indicates invalid strides";
237+
}
238+
}
239+
240+
auto empty =
241+
tensor::EmptyOp::create(rewriter, loc, memoryLayoutType.getShape(),
242+
memoryLayoutType.getElementType());
243+
int64_t rank = inputType.getRank();
244+
SmallVector<OpFoldResult> offsets(rank, rewriter.getIndexAttr(0));
245+
SmallVector<OpFoldResult> sizes;
246+
for (int64_t dim : inputType.getShape())
247+
sizes.push_back(rewriter.getIndexAttr(dim));
248+
SmallVector<OpFoldResult> strides(rank, rewriter.getIndexAttr(1));
249+
tensor::InsertSliceOp insertSlice = tensor::InsertSliceOp::create(
250+
rewriter, loc, input, empty, offsets, sizes, strides);
251+
insertSlice->setAttr("rock.is_expand_strides", rewriter.getUnitAttr());
252+
return insertSlice.getResult();
253+
};
254+
255+
/// Collapse the N-D memory layout tensor into the flat underlying shape.
256+
auto collapseToUnderlying = [&](Value input) -> Value {
257+
assert(input.getType() == memoryLayoutType &&
258+
"expected memory layout type before collapsing");
99259
SmallVector<ReassociationIndices, 4> reassociationIndex(
100260
1, ReassociationIndices(resultType.getRank(), 0));
101261
std::iota(reassociationIndex[0].begin(), reassociationIndex[0].end(), 0);
102-
auto reshape = tensor::CollapseShapeOp::create(
103-
rewriter, loc, resultTensorType, in, reassociationIndex);
104-
rewriter.replaceOp(op, reshape);
105-
return success();
106-
}
262+
return tensor::CollapseShapeOp::create(rewriter, loc, resultTensorType,
263+
input, reassociationIndex);
264+
};
107265

108-
return op.emitError(
109-
"input shape is non standard or broadcast; cannot convert this shape");
266+
FailureOr<Value> result = tryInsertSlice(transposeToMemoryOrder(in));
267+
if (failed(result))
268+
return failure();
269+
270+
rewriter.replaceOp(op, collapseToUnderlying(*result));
271+
return success();
110272
}
111273

112274
namespace {

‎mlir/test/Conversion/LinalgToRock/linalg-to-rock-expand-strides.mlir‎

Lines changed: 56 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,56 @@
1+
// RUN: sed s/##TOKEN_ARCH##/%arch/g %s | rocmlir-opt --linalg-to-rock -verify-diagnostics -split-input-file | FileCheck %s
2+
3+
// CHECK-LABEL: func.func @mlir_dot_log
4+
// CHECK-SAME: (%[[arg0:.*]]: tensor<1536xf16>, %[[arg1:.*]]: tensor<1536xf16>)
5+
func.func @mlir_dot_log(%arg0: tensor<1536xf16>, %arg1: tensor<1536xf16>) -> tensor<4608xf16> attributes {rock.kernel, rock.arch="##TOKEN_ARCH##"} {
6+
// CHECK: %[[expanded:.*]] = tensor.expand_shape %[[arg1]]
7+
// CHECK: %[[expanded_0:.*]] = tensor.expand_shape %[[arg0]]
8+
%expanded = tensor.expand_shape %arg1 [[0, 1, 2]] output_shape [4, 16, 24] : tensor<1536xf16> into tensor<4x16x24xf16>
9+
%expanded_0 = tensor.expand_shape %arg0 [[0, 1, 2]] output_shape [4, 24, 16] : tensor<1536xf16> into tensor<4x24x16xf16>
10+
// CHECK: %[[cst:.*]] = arith.constant dense<0.000000e+00> : tensor<4x24x24xf16>
11+
%cst = arith.constant dense<0.000000e+00> : tensor<4x24x24xf16>
12+
// CHECK: %[[alloc:.*]] = bufferization.alloc_tensor() : tensor<4x24x24xf16>
13+
// CHECK: %[[gemm:.*]] = rock.gemm %[[alloc]] = %[[expanded_0]] * %[[expanded]]{{.*}}storeMethod
14+
%0 = linalg.batch_matmul ins(%expanded_0, %expanded : tensor<4x24x16xf16>, tensor<4x16x24xf16>) outs(%cst : tensor<4x24x24xf16>) -> tensor<4x24x24xf16>
15+
// CHECK: %[[empty:.*]] = tensor.empty() : tensor<4x24x24xf16>
16+
// CHECK: %[[log:.*]] = linalg.log ins(%[[gemm]]{{.*}}) outs(%[[empty]]{{.*}}) -> tensor<4x24x24xf16>
17+
%1 = tensor.empty() : tensor<4x24x24xf16>
18+
%2 = linalg.log ins(%0 : tensor<4x24x24xf16>) outs(%1 : tensor<4x24x24xf16>) -> tensor<4x24x24xf16>
19+
// CHECK: %[[alloc2:.*]] = bufferization.alloc_tensor() : tensor<4x48x24xf16>
20+
// CHECK: %[[expand:.*]] = rock.expand_strides %[[log]] into %[[alloc2]]
21+
%3 = tensor.empty() : tensor<4x48x24xf16>
22+
%inserted_slice = tensor.insert_slice %2 into %3[0, 0, 0] [4, 24, 24] [1, 1, 1] {rock.is_expand_strides}: tensor<4x24x24xf16> into tensor<4x48x24xf16>
23+
// CHECK: %[[collapsed:.*]] = tensor.collapse_shape %[[expand]]
24+
// CHECK: return %[[collapsed]]
25+
%collapsed = tensor.collapse_shape %inserted_slice [[0, 1, 2]] : tensor<4x48x24xf16> into tensor<4608xf16>
26+
return %collapsed : tensor<4608xf16>
27+
}
28+
29+
// -----
30+
31+
32+
// CHECK-LABEL: func.func @mlir_dot_log
33+
// CHECK-SAME: (%[[arg0:.*]]: tensor<320xf16>, %[[arg1:.*]]: tensor<1536xf16>)
34+
func.func @mlir_dot_log(%arg0: tensor<320xf16>, %arg1: tensor<1536xf16>) -> tensor<1152xf16> attributes {rock.kernel, rock.arch="##TOKEN_ARCH##"} {
35+
// CHECK: %[[expanded:.*]] = tensor.expand_shape %[[arg1]]
36+
// CHECK: %[[expanded_0:.*]] = tensor.expand_shape %[[arg0]]
37+
%expanded = tensor.expand_shape %arg1 [[0, 1, 2]] output_shape [4, 16, 24] : tensor<1536xf16> into tensor<4x16x24xf16>
38+
%expanded_0 = tensor.expand_shape %arg0 [[0, 1, 2]] output_shape [4, 5, 16] : tensor<320xf16> into tensor<4x5x16xf16>
39+
// CHECK: %[[cst:.*]] = arith.constant dense<0.000000e+00> : tensor<4x5x24xf16>
40+
%cst = arith.constant dense<0.000000e+00> : tensor<4x5x24xf16>
41+
// CHECK: %[[alloc:.*]] = bufferization.alloc_tensor() : tensor<4x5x24xf16>
42+
// CHECK: %[[gemm:.*]] = rock.gemm %[[alloc]] = %[[expanded_0]] * %[[expanded]]{{.*}}storeMethod
43+
%0 = linalg.batch_matmul ins(%expanded_0, %expanded : tensor<4x5x16xf16>, tensor<4x16x24xf16>) outs(%cst : tensor<4x5x24xf16>) -> tensor<4x5x24xf16>
44+
// CHECK: %[[empty:.*]] = tensor.empty() : tensor<4x5x24xf16>
45+
// CHECK: %[[log:.*]] = linalg.log ins(%[[gemm]]{{.*}}) outs(%[[empty]]{{.*}}) -> tensor<4x5x24xf16>
46+
%1 = tensor.empty() : tensor<4x5x24xf16>
47+
%2 = linalg.log ins(%0 : tensor<4x5x24xf16>) outs(%1 : tensor<4x5x24xf16>) -> tensor<4x5x24xf16>
48+
// CHECK: %[[alloc2:.*]] = bufferization.alloc_tensor() : tensor<4x12x24xf16>
49+
// CHECK: %[[expand:.*]] = rock.expand_strides %[[log]] into %[[alloc2]]
50+
%3 = tensor.empty() : tensor<4x12x24xf16>
51+
%inserted_slice = tensor.insert_slice %2 into %3[0, 0, 0] [4, 5, 24] [1, 1, 1] {rock.is_expand_strides} : tensor<4x5x24xf16> into tensor<4x12x24xf16>
52+
// CHECK: %[[collapsed:.*]] = tensor.collapse_shape %[[expand]]
53+
// CHECK: return %[[collapsed]]
54+
%collapsed = tensor.collapse_shape %inserted_slice [[0, 1, 2]] : tensor<4x12x24xf16> into tensor<1152xf16>
55+
return %collapsed : tensor<1152xf16>
56+
}

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