CHERI-RISC-V: as-user cap-auth cap store-cond

Author: nwf-msr

target/riscv/helper.h

@@ -78,6 +78,7 @@ DEF_HELPER_3(lr_c_u_cap, void, env, i32, i32)
 DEF_HELPER_3(sc_c_modedep, tl, env, i32, i32)
 DEF_HELPER_3(sc_c_ddc, tl, env, i32, i32)
 DEF_HELPER_3(sc_c_cap, tl, env, i32, i32)
+DEF_HELPER_3(sc_c_u_cap, tl, env, i32, i32)
 #endif
 
 #ifdef CONFIG_TCG_LOG_INSTR

target/riscv/insn32-cheri-32.decode

@@ -55,3 +55,4 @@ amoswap_c   00001 . . ..... ..... 011 ..... 0101111 @atom_st
 ld_c_u_cap    1111001  01011 ..... 000 ..... 1011011 @r2  # This is ld_d_u_cap (8-byte load) for RV64
 lr_c_u_cap    1111001  11011 ..... 000 ..... 1011011 @atom_ld_cap_or_ddc  # This is lr_d_u_cap for RV64
 st_c_u_cap    1111000  ..... ..... 000 01011 1011011 @r_2source  # This is st_d_u_cap (8-byte store) for RV64
+sc_c_u_cap    1111000  ..... ..... 000 11011 1011011 @atom_st_cap_or_ddc  # This is sc_d_u_cap for RV64

target/riscv/insn32-cheri-64.decode

@@ -69,3 +69,4 @@ ld_c_u_cap  1111001  11111 ..... 000 ..... 1011011 @r2  # Would be ld_q_cap for
 st_d_u_cap  1111000  ..... ..... 000 01011 1011011 @r_2source  # This is st_c_cap (capability store) for RV32
 st_c_u_cap  1111000  ..... ..... 000 01100 1011011 @r_2source  # Would be st_q_cap for RV128
 sc_d_u_cap  1111000  ..... ..... 000 11011 1011011 @atom_st_cap_or_ddc  # RV64-only (sc_c_cap for RV32)
+sc_c_u_cap  1111000  ..... ..... 000 11100 1011011 @atom_st_cap_or_ddc  # RV64-only (would be sc_q_cap for RV128)

target/riscv/insn_trans/trans_cheri.c.inc

@@ -603,6 +603,12 @@ static inline bool trans_sc_c_cap(DisasContext *ctx, arg_sc_c_cap *a)
     return trans_sc_c_impl(ctx, a, &gen_helper_sc_c_cap);
 }
 
+static inline bool trans_sc_c_u_cap(DisasContext *ctx, arg_sc_c_u_cap *a)
+{
+    a->rd = a->rs2; /* Not enough encoding space for explicit rd */
+    return trans_sc_c_impl(ctx, a, &gen_helper_sc_c_u_cap);
+}
+
 static inline bool trans_amoswap_c(DisasContext *ctx, arg_amoswap_c *a)
 {
     REQUIRE_EXT(ctx, RVA);

target/riscv/op_helper_cheri.c

@@ -466,3 +466,9 @@ target_ulong HELPER(sc_c_cap)(CPUArchState *env, uint32_t addr_reg, uint32_t val
     return sc_c_impl(env, addr_reg, val_reg, /*offset=*/0,
                      cpu_mmu_index(env, false), GETPC());
 }
+
+target_ulong HELPER(sc_c_u_cap)(CPUArchState *env, uint32_t addr_reg, uint32_t val_reg)
+{
+    return sc_c_impl(env, addr_reg, val_reg, /*offset=*/0, MMU_USER_IDX,
+                     GETPC());
+}